1. Field of the Invention:
The present invention relates to a synchronizing circuit for an optical scanning apparatus, and, more particularly, to a synchronizing circuit for determining the starting point of horizontal scanning conducted by an optical scanning apparatus.
2. Description of the Related Art:
Conventionally, writing of an image conducted by an optical scanning apparatus employed as a laser printer is timed by a synchronizing circuit such as that shown in FIG. 4 which generates a synchronizing signal when a photo sensor disposed outside an image recorded area detects the passage of a laser beam. Such a synchronizing circuit includes a clock pulse oscillator 71 for generating a clock pulse signal having a frequency of k times that of a synchronizing signal (having a frequency of f.sub.0), and a frequency dividing circuit 72 for dividing the frequency kf.sub.0 of the generated clock pulse signal by k. The synchronizing circuit generates a synchronizing signal by starting to divide the frequency of the clock pulse signal when the signal emerges after the passage of the laser beam has been detected by the optical sensor. In this synchronizing circuit, since the frequency division is started when the clock pulse signal emerges, the detection signal from the photo sensor and the synchronizing signal are out of phase by a time interval in which one cycle of the clock pulse signal occurs or less, i.e., by a time interval corresponding to one-kth of the period of the synchronizing signal or less.
A synchronizing circuit such as that shown in FIG. 5 is also known which includes an oscillator 73 for generating a clock pulse signal (having a frequency of f.sub.0), a delay circuit 74 with k taps which receives the output of the oscillator 73 and successively delays the phase of the clock pulse signal by a time interval corresponding to one-kth of the period of the clock pulse signal, and a selecting circuit 75 for suitably selecting as a synchronizing signal the output of the delay circuit whose phase difference is at a minimum with respect to a detection signal from the photo sensor (see Japanese Patent Laid-Open No. 56-126378). In this synchronizing circuit, since the clock pulse signal is successively delayed by a time interval corresponding to one-kth of the period thereof, the detection signal from the photo sensor and the synchronizing signal are out of phase by a time interval corresponding to the delay time or less, i.e., by a time interval corresponding to one-kth of the period of the clock pulse signal (which is equal to the period of the resultant synchronizing signal) or less.
Techniques relevant to the present invention includes those disclosed in the specifications of Japanese Patent Laid-Open No. 57-3187, Japanese Patent Laid-Open No. 57-3188, Japanese Patent Laid-Open No. 58-104565, Japanese Patent Laid-Open No. 60-153259, Japanese Patent Laid-Open No. 61-126862, Japanese Patent Laid-Open No. 61-150567, Japanese patent Laid-Open No. 61-227423, and Japanese Patent Laid-Open No. 61-296815.
In the above-described synchronizing circuits utilizing a frequency dividing circuit, since the output of the photo sensor and the resultant synchronizing signal are out of phase by a time interval corresponding to one-kth of the period of the synchronizing signal, a clock pulse oscillator for oscillating a signal having a high frequency of kf.sub.0 is required in order to minimize this phase difference, making the oscillator complicated and expensive.
With the synchronizing circuits employing a delay circuit, minimization of the phase difference is achieved by shortening the delay time. This is in turn achieved by increasing the number of taps in the delay circuit, making the delay circuit complicated. In particular, in a case where character information is recorded on a microfilm in dots utilizing a laser beam , a resolution which is as high as about 3360 dots/7.2 mm is required, making the phase difference a crucial matter.